Integrated circuit (IC) devices are prone to electrostatic discharge (ESD) events, whereby external contacts of the IC devices are subjected to large electrical charges (positive or negative). Functional circuitry within an IC device is required to be protected from electrical currents created by such large electrical charges at the external contacts of the IC devices, which can cause erroneous behavior within the functional circuitry and even permanently damage the functional circuitry due to the magnitude of the electrical currents that can be generated by ESD events.
To protect the functional circuitry of an IC device from ESD events, it is known to provide susceptible external contacts of the IC device with ESD protection structures. Conventional ESD protection structures typically include thyristor structures (i.e. P-N-P-N semiconductor structures) coupled between an external contact to be protected, such as an input/output (I/O) contact of the IC device, and a power supply contact (e.g. ground or Vss) to which ESD currents are to be shunted.
Many applications require bidirectional ESD protection to be provided for at least some of the external contacts of an IC device, for example +40V positive ESD protection and, say −2V or −5V negative ESD protection. Conventionally, a high voltage NPNB (bidirectional N-P-N) ESD structure is used to provide the positive (+40V) ESD protection. However, such a conventional high voltage NPNB ESD structure arranged to provide, say, +40V ESD protection is typically only able to achieve a minimum negative ESD protection of, say, −13V to −15V. Accordingly, in order to achieve negative ESD protection of a lesser magnitude than −13V, for example in the region of −2V to −5V, it is necessary to provide a separate negative ESD structure in parallel with the high voltage NPNB ESD structure.
However, the footprint of ESD protection structures at the external contacts of IC devices is a significant limiting factor in the minimum die size that can be achieved. Accordingly, the need for two separate ESD structures to be used to provide such bidirectional ESD protection is undesirable as it increases the die size of the IC device.